In the News

Fairchild Semiconductor’s Enhanced Reset Timers Give Mobile Device Users a Simple Reset Solution for Hardware Lock Ups
05/16/2012

RFaxis Reveals Breakthrough in Its CMOS RF Front-End Technology for Wi-Fi Enabled Mobile Handsets
05/16/2012

Carbon Design Systems Unveils Off-the-Shelf Performance Analysis for ARM Cortex-A Processors
05/16/2012

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Tech Talks

SoC Verification Requires 100x Performance Boost: Accelerated verification IP needed to enable simulation acceleration
Cadence (05/08/2012)

DDR Bandwidth Optimization - Saving money, saving power
Cadence (04/10/2012)

Delivering Great Audio with an SoC-Ready, IP Subsystem Solution
Synopsys (04/03/2012)

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White papers

Technical Considerations for Implementing USB 3.0 on SoCs
Synopsys (05/11/2012)

Audio Subsystems for Efficient SoC Integration: Integrating High-Definition Multi-Channel Audio Solutions at the Speed of Sound
Synopsys (03/30/2012)

High-End Audio Made Easy: The Software Story: Software Integration of an Audio Subsystem into a System on Chip
Synopsys (03/30/2012)

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VIP is prefabricated building blocks that you can drop into your flow to perform a predefined function. But instead of becoming blocks of the design itself, Verification IP blocks become parts of the testbench used in verification. Like other IP, verification IP can, in theory, be designed for reuse or licensed from third parties.