Verification IP Portal

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In the News

Synopsys Delivers VDK for Renesas RH850 MCUs
05/23/2013

TSMC Certifies Cadence Tempus Timing Signoff Solution for 20nm Designs
05/23/2013

Cadence Celebrates 25 Years as a Leader in the EDA Industry at 50th DAC
05/23/2013

More News

Tech Talks

The Coming Impact of Mobile PCI Express (M-PCIe) on SoCs and Devices
Cadence (04/30/2013)

The Use of FinFETs in IP Design
Synopsys (04/23/2013)

The Coming Impact of Mobile PCI Express (M-PCIe) on SoCs and Devices
Cadence (03/12/2013)

More Tech Talks

White Papers

Twelve Design Techniques for Successful Integration of Data Converter IP into an SoC
Synopsys (01/22/2013)

Emerging MTP NVM Applications in Mobile Multimedia and Digital Home Electronics
Synopsys (01/22/2013)

Designing with FinFETs The Opportunities and the Challenges
Synopsys (01/22/2013)

More White Papers

Request Verification IP

Do you have questions on the IP offerings listed here? Our IP Concierge service can contact leading IP suppliers on your behalf, and those that meet your needs will reply to you directly.

About Verification IP

VIP is prefabricated building blocks that you can drop into your flow to perform a predefined function. But instead of becoming blocks of the design itself, Verification IP blocks become parts of the testbench used in verification. Like other IP, verification IP can, in theory, be designed for reuse or licensed from third parties.