Home  >  Blogs  >  #55DAC: Must-see New Deep Learning Processors, Embedded FPGA Technologies, and SoC Design Solutions in the DAC 2018 IP Track

About the Author

Ty Garibay is the Chair of the IP Track for DAC 2018 and CTO of Arteris IP, a provider of interconnect IP for SoCs. Previously, Ty led design teams at Altera, Texas Instruments and ARM. As an architect, he has led the development of MIPS, ARM, x86 and 68K microprocessors. Ty is named on more than 30 issued patents.