July 19, 2022
ARC VPX Vector DSPs: Digital Signal Processing Goes Floating Point

Markus Willems
Synopsys
Traditionally, digital signal processors (DSPs) have been constrained in architecture for specific signal processing computation applications. The combination of very long instruction word (VLIW) and single instruction multiple data (SIMD) architectures provides the parallel throughput needed for high computation performance, with data generally being 16, 24, and 32-bit fixed point. This was well suited to the algorithms used in applications such as voice/audio and communications. For recent generations of algorithms and computation, the requirements have been evolving and changing due to higher dynamic range, productivity, and reliability requirements.
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