Algotronix

Semiconductor IP Catalog

Media Access Control Security is specified by the IEEE as a layer 2 security scheme, compatible with revised IEEE 801.1X-2010

AES-RNG Algotronix

AES based Random Number Generator

Duplex 10Gbit AES-GCM for OTN Algotronix

Area optimised full duplex AES-GCM implementation for OTN networking

AES-GCM-100G-OTN Algotronix

Ultra high performance (20 to 800Gbit) AES-GCM for OTN networks

AES - GCM Algotronix

Implementation of AES in Galois Counter Mode (GCM)

AES_G2_PLATINUM Algotronix

AES Core Generation 2

AES-GCM10G Algotronix

AES-GCM optimised for 10Gbit/sec IEEE 802.1 MAC Security

AES-CCM Algotronix

AES-CCM provides confidentiality and authentication for wireless systems in FPGA or ASIC technology

XTS-AES core for storage encryption to NIST SP800-38E specification used in IEEE 1619-2007

AES_G3 Algotronix

AES Core with configurable internal data path width

AES G3 Core for Video Algotronix

Low area, pipelined implementation of AES with moderate key latency suitable for video encryption/ decryption

IPSEC (RFC 4303) 1Gbit IP Core Algotronix

High performance pipelined implementation of the Encapsulating Security Protocol mode of IPSEC (RFC4303) for FPGA

Media Access Control Security supporting multiple Security Entities (SecYs)

Media Access Control Security is specified by the IEEE as a layer 2 security scheme, compatible with revised IEEE 801.1X-2010

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130-10 Calton Road
Edinburgh, EH8 8JQ
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