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About the Author

Shyam has done his BS in Electrical Engineering from Indian Institute of Technology, Kanpur and has over 22 years of experiences in EDA. His area of expertise include processor architecture, storage and memory sub systems. He is currently working as Senior Software Architect responsible for Server and Low Power DRAM VIPs solutions offered by Cadence. He has worked at Mentor Graphics and Denali Design Systems before joining Cadence Design Systems in 2010.