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Hot Chips in the Valley
This year’s Stanford event covers many-core to server-grade processors, integration issues, and everything in between.
Sponsored by the IEEE in cooperation with the ACM, the “Hot Chips” symposium is an annual event typically held on the Stanford University campus. Due to renovations at Stanford, this year’s event has been moved to the Flint Center for the Performing Arts in Cupertino.
Hot Chips focuses on the latest developments in the design of high-performance microprocessors and system-on-a-chip (SoC) devices, associated software, and systems.
Today’s (Tuesday, Aug. 28) events include two keynotes by the CTOs from AMD and Alcatel-Lucent and several sessions covering microprocessors, interconnects, many cores, GPUs, multimedia, and integration.
I’ll cover tomorrow’s (Wednesday, Aug. 29) events, which include a keynote by Pat Gelsinger, COO at EMC, titled: “Cloud Transforms IT, Big Data Transforms Business.” Session topics are arranged as follows:
- Technology and Scalability – Covering FPGAs, 32-nm CMOS, and reducing transistor variability
- SoC – including femtocell and smartphone architectures
- Datacenter chips – from IBM’s new Power&+ to Intel’s Xeon E5-2600 and Applied Micro’s X-Gene
- Big Iron – Didn’t we used to call them mainframes?
See you there!