Semiconductor IP News and Trends Blog
About: Dimitry Pavlovsky
April 29, 2022 - By Dimitry Pavlovsky
As discussed in the last installment of the blog, a robust system level scoreboard is essential for functional verification and performance validation of modern SoCs. A properly architected system scoreboard should work in conjunction with interface Verification IPs (VIPs) and … Continue reading
July 20, 2021 - By Dimitry Pavlovsky
Many of today’s SoCs are built around multi-layered, sophisticated interconnect IP components that link together multiple processor cores, caches, memories, and dozens of other IP blocks. These interconnects are enabling new generations of data servers and high-performance mobile devices. Being … Continue reading
June 1, 2021 - By Dimitry Pavlovsky
As discussed in the previous blog, the AMBA® 5 specification updates introduced several performance improvement features which align the AMBA5 ACE/AXI protocol with AMBA® 5 CHI (Coherent Hub Interface) specification. Among them is a new class of atomic transactions which … Continue reading
April 23, 2021 - By Dimitry Pavlovsky
The industry-standard ARM AMBA® 5 protocol specifications continue to evolve, further improving performance and efficiency of key ARM architecture features. Besides the updates of powerful AMBA CHI (Coherent Hub Interface) specification with Issue D and Issue E features (which will … Continue reading
April 19, 2021 - By Dimitry Pavlovsky
Cache coherency is not a new concept. Coherent architectures have existed for many generations of CPU and Interconnect designs. Verifying adherence to coherency rules in SoCs has always been one of the most complex challenges faced by verification engineers. Over … Continue reading
