Semiconductor IP News and Trends Blog
System Verification Scoreboard: Its Role and Partnership with Verification IPs
As discussed in the last installment of the blog, a robust system level scoreboard is essential for functional verification and performance validation of modern SoCs.
A properly architected system scoreboard should work in conjunction with interface Verification IPs (VIPs) and share verification responsibilities. It should monitor all ports on an SoC’s interconnect, deploying clever algorithms to track transactions as they are transported through the interconnect to their destinations, and checking proper routing of responses. It should verify the data integrity of the traffic traversing the interconnect and account for various data transformations associated with crossing interface protocol domains, automatically handling data upsizing, downsizing, and splitting transformations.
In cache-coherent hardware applications, the system scoreboard gets new responsibilities as well as new challenges. Working in close collaboration with interface VIPs, the scoreboard should actively track the states of caches across the entire system, anticipate and justify operation of the System Hardware Coherency Manager (aka. Point of Coherency) and flag out any coherency violations and hazards. This could be achieved by a certain “Division of Verification Labor” (let’s call it that! Blush) between Interface VIPs and the scoreboard.
Here is how it works in the cache-coherent systems:
Here the interface VIPs are responsible for:
- Detailed verification of the protocol operations at a given interconnect interface
- L2 cache state tracking
- Checking suitability of transactions to L2 cache states
For example, if CHI VIP detects a WriteBack transaction sent for a cache line in a non-Dirty state (e.g. Clean or Invalid), it would fire an error.
While System Scoreboard is responsible for:
- Coherency verification among multiple interfaces
- System-Level Cache (SLC aka. L3) tracking
- Snoop Filter operation
For example, the scoreboard should flag out a snoop transaction it cannot correlate to a previously issued request transaction.
Looking at the simple use-cases outlined above, one can see that the “partnership” between interface VIPs and system-level scoreboard is essential. Only by using such a comprehensive verification approach, verification engineers can thoroughly verify modern complex interconnect-centric SoCs.