Home  >  White Papers  >  Analog and Power Management Trends in ASIC and SoC Designs

Contact Vendor


Vidatronic, founded in 2010, licenses their latest analog Intellectual Property (IP) designs, including power management unit (PMU) and LED lighting solutions, for integration into customers’ application specific integrated circuits (ASICs) and systems on a chip (SoCs). Vidatronic's capabilities help customers achieve product feature and performance advantages. Their service gets them to market faster and their experience reduces overall risk.

500 N. Capital of Texas HWY, Building 3 Suite 201
Austin, Texas 78746
To request more information about Vidatronic
About the Author

Luis joined Vidatronic in 2017 as an Analog Design Engineer, working on power management IP in a variety of advanced technologies from 180 nm down to 22 nm. In his time at Vidatronic, he has co-invented a patent for low-power, high-accuracy Power-on-Reset circuits issued in October 2019. He has also co-authored and published a white paper, Analog and Power Management Trends in ASIC and SoC Designs, in 2020. Luis received his B.S Degree in Computing Engineering from the Universidad Autonoma de Yucatan, Mexico, in 2014 and his M.E. in Electrical Engineering at Texas A&M University, College Station, TX, USA in 2018.

Stephen has > 20 years of industry leadership experience, specializing in driving award-winning business results. Stephen was formerly the Director of Marketing for ESS Technology, where he started an entirely new product line for the company. He has also held senior marketing and applications engineering management roles at TI and IDT. Stephen received his BS and MS degrees in Electronics from Southeastern Oklahoma State University.