Semiconductor IP News and Trends Blog

Will Stage 4 Mark the End of Semiconductor EDA Consolidation?

Everyone talks about the increasing consolidation of the EDA tools market, but few provide quantified data for accurate predictions.

Mergers won’t guarantee the survival of chipmakers, explained Microchip’s CEO Steve Sanghi in a recent EETimes article by Rick Merritt. “Mergers are marking the chip industry’s maturity as companies get bigger to survive harsher times ahead.”

The consolidation of the EDA market is nothing new. The past three years have been a particularly active period. But consolidation can not continue forever in a market where venture-capital funding is declining for semiconductor start-ups. Is there any way to gauge the level of consolidation in the market as a whole and in particular the EDA tools segment? Further, is there a level of consolidation at which IP design and reuse will be adversely affected? We’ll start with the first question.

Consolidation is the merger and acquisition of many smaller companies into much larger ones. This process is a natural part of market segment growth with well delineated phases.

Both the acquired and the acquiring companies have its own product life cycle process for the development of chips. EDA tools automate much of the design process, which is a necessity for today’s extremely complex system-on-chips (SoC). But how is the product lifecycle changed when one company is acquired by another?

The Consolidation Curve, purportedly the founding premise of the QHS group, represents a “product life-cycle” as it is influenced by consolidation in a maturing industry. Simply put, the affect of consolidation is to significantly shorten the duration of the life-cycle.

If the consolidation occurs from an outside influence such as investment bankers or activist investors (recall Icahn vs. Mentor), then the shortening of the curve results from the fees the bankers or investors collect immediately after the consolidation.

But what happens if the consolidation occurs amongst the legitimate players of the industry, e.g. Cadence’s recent acquisition of Forte? According to a Harvard Business Review paper, most industries progress predictably through a clear consolidation life cycle. The researched paper concluded that, once an industry forms, it will move through four stages of consolidation: Opening, Scale, Focus and finally Balance-Alliance. Interestingly, the semiconductor industry is missing from this curve, which was first constructed 12 years ago.

Once an industry forms or is deregulated, it will move through four stages of consolidation – or disappear. (Courtesy Harvard Business Review)

Where would the semiconductor industry be placed on this curve? I have no objective data to determine this point. But consider this comment which Pradeep Chakraborty attributes to Mentor’s CEO Wally Rhines: “… Turnover among the “top 10” in the semiconductor industry has been high, with more than 50 percent disappearing from the top ten over the last 50 years.” This would seem to place the semiconductor industry solidly in the Stage 3 (Focus) portion of the Harvard consolidation curve.

Let’s conjecture a bit further, separating out the EDA-IP tools segment from the entire semiconductor market. Again, I have no concrete data to offer. However, consider this footnote from last year’s EDA Consortium (EDAC) panel discussion of leading CEOs. The question posed to the EDA CEOs was whether the EDA industry would consolidate from three down to two major players? A non-scientific poll of EDAC members revealed that 48% agreed while 52% disagreed. Remember, this question speculated about a major player consolidation. Such a move could further hasten the consolidation of the few remaining startups in the EDA industry.

With roughly half of the EDAC members agreeing that the EDA market will shrink from 3 to 2 major players, this would place the tools industry in the third stage of the Harvard Consolidation Curve. The third “Focus” stage consists of a market controlled by the top three industry players which make up between 35% to 70% of that market. Further, the market still contains 5 to 12 major players, which is not the case in the EDA space.

Stage 3 doesn’t really describe today’s EDA tool market. Rather, it seems to me that the industry is quickly approaching Stage 4 – Balance and Alliance. What will be the growth rate for IP in this last stage of market consolidation?

Continuing consolidation in the EDA tools market will affect the design and usage of semiconductor IP (SIP). SIP suppliers are not immune to the flattening of the EDA market. Chip designers and manufactures need EDA tools to create IP-rich System-on-Chip (SoC) products. Consolidation of the tools industry may affect the third-party IP supply market. Quantifying that affect will be the topic of a future blog.