Semiconductor IP News and Trends Blog
Dealing with Disastrous Change
By John Blyler
Japan is a leading region for global IC design. In light of recent natural disasters, the country’s chip design and manufacturing communities will benefit from the timely introduction of the new Japanese-language IP portal. The online resource will make it easier to evaluate the effects of technical changes wrought by either natural or manmade sources.
By definition, disasters are agents of change. By education and experience, engineers are the managers of change. Dealing with change is what separates engineers from mere laymen of the technical art. But dealing with change requires the time consuming process of re-evaluating past decisions.
That is why the launch of a Japanese version of ChipEstimates IP planning and estimation site couldn’t have happened at a better time for the global semiconductor industry. But before I elaborate, let me set the context.
The brutal March 2011 earthquake and subsequent tsunami disrupted the lives of thousands of residents living in the northeast corner of Japan. The human toll was staggering. The economic toll was just as disturbing. [see Japan’s Disaster Ripples Through Semiconductor Industry]
The effects of both the human cost and economic impact are still being felt around the world, especially in the tightly connected semiconductor market.
The global community has since been reminded that Japan’s important place in the semiconductor supply chain. The Pacific Island provided nearly 25 percent of the world’s semiconductor production capacity. Further, Japan supplied more than 60 percent of the world’s silicon wafers, from which integrated chips are created, according to a recent 2011 report from Objective Analysis.
How does the launch of a Japanese-language version of the world’s largest IP and chip planning portal relate to the country’s recent disaster? The relationship is summed up in the phrase, “managing change.” The activity of engineering is nothing if not a continuing exercise in dealing with change. Change will affect all phases of a system or product lifecycle, but it is most often manifest in changing requirements. When changes occur, engineers must re-evaluate the effect of changes on past architectural decisions. Any changes in the architectural design may have a rippling effect throughout the lower-level subsystem requirements and design decisions.
To re-evaluate past decisions, engineers must re-examine their original planning strategy’s and trade-off assumptions. This may require simulations and estimation to be re-run with altered algorithms, new variables and adjusted constants.
In the semiconductor industry, changes to complex System-on-Chip (SoC) designs may require the use of in-house IP that can no longer be supplied or maintained by the earthquake damaged facilities of IDMs or disrupted lives of their employees. Outside, third-party IP may be needed to replace inside IP that is no longer available – perhaps a special type of I/O interface, memory controller or wireless IP.
Even if the IP is available, the foundry targeted for that particular IP may still be off-line. One should remember that Freescale Semiconductor, Fujitsu, TI, Renesas and others, all had facilities located in the area of Japan hardest hit by the disasters.
If a new foundry is needed, then finding a new IP supplier and foundry that supports the right process geometry may be a time consuming and costly challenge. But there may be no alternative, especially if the time-to-market window for the end product is tight. For example, in the time sensitive mobile product space, changing IP may have a direct effect on the systems total low-power budget, especially if a design must be retargeted to a higher-node foundry.
Other scenarios for changes in either the SoC’s IP or targeted manufacturing foundry can be constructed. All such changes would require engineers to revisit existing development plans, simulations and chip estimations. Fortuitously, such tools are now available to the Japanese chip designer in the new regionally tailored version of the Chipestimate portal.
Regardless of the cause – from manmade to natural disasters – engineers must constantly deal with changing requirements. Changes are easier to handle if the right tools to evaluate changes are easily accessible in one’s native language. Such is the now the case for IP designers in Japan.