The Design and Verification Conference and Exhibition (DVCon U.S.) held earlier this year once again brought chip developers together with EDA tool vendors to tackle major issues. Continue reading »

The first day of the Design and Verification Conference and Exhibition (DVCon) is dedicated to the updates and short tutorials from the standards body that supports it – Accellera Systems Initiative. Continue reading »

Algronix releases new encryption IP; Interview with National Academy policy advisor; High voltage switching; X-Rays from Scotch Tape; Automotive and 5G IP Continue reading »

EDA earnings; Tesla vs. Edison; emulation; IP fingerprinting; embedding Agile; machine learning; back-doors; FPGA video; VR on PC; collaborative spectrum Continue reading »

Yatin Trivedi, DVCon Chair, talks about Internet-of-Things verification issues and differences between standard specifications and implementations efforts. By John Blyler, Editorial Director As the general chair of the upcoming semiconductor chip design and verification conference (DVCon), Yatin Trivedi discusses the … Continue reading »

Debugging the debug; UPF; digitizing sound; testing assertions; occupant aware homes; embedded verification; uninitialized variables; and glow-in-the-dark DDR4. Continue reading »

Xilinx in space; lensless optics; the AMBA coherent host interface; the downside of silos; vertical companies; gender inequity; PCIe Gen 4; and the de-evolution of the SoC Continue reading »

A panel on the SoC verification gap leads to ongoing discussions about the pain threshold and maturing attitudes toward emerging standards and inefficiencies. Continue reading »

RF and mixed signal intellectual property (IP) technologies benefits from real growth, rumors of Apple’s WiFi chips, and MEMS. Continue reading »