Home > Log In
Log In
sADC-uLP-ANC.03_TSMC_40_ULP
IP Preview
Name:
sADC-uLP-ANC.03_TSMC_40_ULP
Provider:
Dolphin Design
Description:
Capacitor-less 104 dB dynamic range ADC with low power mode and ultra low latency capability
Overview:
The sADC-uLP-ANC.03 is a mixed (analog and digital) Virtual Component containing three mono ADCs, and additional functions offering an ideal mixed signal front-end for low power, low-latency, fast ...
Category:
Additional data available! Portability, process node, maturity, features, and more can be viewed by logging in with your ChipEstimate.com account.
To see the entire IP datasheet from Dolphin Design please log in or register.
Please log in to continue
Please log in to continueNew user?
Latest Semiconductor IP
LVDS Tx PHY IP
T2M
IEEE802.11n/ac/ax WiFi L...
Global IP Core
DDR-PHY-TCI-TN28HPCP...
True Circuits
PLL-TCI-TN7FF-CGHPLL
True Circuits
Most Popular IP
EZ0008K8AB180MX11
eMemory
USB 3.x Hub IP
SmartDV
EE0064X8CW180BF07
eMemory
CXL 2.0 Controller
Rambus
MI2Cv2
Mentor