Home > Log In
Log In
ZSPneo
IP Preview
Name:
ZSPneo
Provider:
VeriSilicon
Description:
DSP and MCU capabilities in a single core based on ZSP G1 architecture
Overview:
ZSPneo is ideal for cost-sensitive applications that require control processing performance above existing 8-bit microcontrollers, but cannot tolerate the cost of 32 bit microcontrollers. ZSPneo ...
Category:
Additional data available! Portability, process node, maturity, features, and more can be viewed by logging in with your ChipEstimate.com account.
To see the entire IP datasheet from VeriSilicon please log in or register.
Please log in to continue
Please log in to continueNew user?
Latest Semiconductor IP
SMIC15LV_MC
VeriSilicon
SMIC25 MC
VeriSilicon
SMIC09LL 9T HVT STD Cells
VeriSilicon
SMIC09LL 9T RVT STD Cells
VeriSilicon
SMSB11ULL
VeriSilicon
Most Popular IP
Dual Port SRAM Compiler - TSMC 6nm
Dolphin Technology
dwc_arc_npx6_tensor_fpu_option
Synopsys
General purpose, low area, low jitter fractional-N PLL
Silicon Creations
PLL-TCI-TN7FFLVT-CGLPLL
True Circuits
Inter Integrated Circuit (I2C) with FIFO - APB Bus
Digital Blocks