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RAM-based Shift Register
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Name:
RAM-based Shift Register
Provider:
Xilinx
Description:
RAM-based Shift Register
Overview:
The RAM-based Shift Register IP generates fast, compact FIFO-style registers, delay lines or time-skew buffers using the SRL16/SRL32 mode of the slice LUTs available in Xilinx FPGA devices. ...
Category:
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