Home > Log In
Log In
IPC70000 - IEEE1588v2 Master and Slave
IP Preview
Name:
IPC70000 - IEEE1588v2 Master and Slave
Provider:
IPClock
Description:
IPC70000 - IEEE1588v2 (PTPv2) standard compliant Master and Slave Ordinary Clock utilizing FPGA and external CPU
Overview:
IPClock's IPC70000 is a full IEEE1588v2 (PTPv2) standard compliant Master/Slave Ordinary Clock (OC). Comprised of innovative Sync over Packet Engine (SoPE), state-of-the-art clock synchronization ...
Category:
Additional data available! Portability, process node, maturity, features, and more can be viewed by logging in with your ChipEstimate.com account.
To see the entire IP datasheet from IPClock please log in or register.
Please log in to continue
Please log in to continueNew user?
Latest Semiconductor IP
WEA811S45G
weasic
WEA1014S46G
weasic
WEA116S45G
weasic
WEA48S55T
weasic
Most Popular IP
General purpose, low jitter fractional-N PLL
Silicon Creations
M31 PCIe 5.0 PHY IP for Storage and High Bandwidth Connection
M31 Technology Corporation
DDR-PHY-TCI-TN28HPCP-DDR43PHY
True Circuits
MEERKAT_1_SLG_IN-CHIP_MONITORING
Dolphin Design
SDRAM DDR3/2 & LPDDR3/2 Hardened PHY - TSMC 65nm
Dolphin Technology