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Programmable CMOS PLL high-frequency divider
USB-C 3.1 DisplayPort 1.3 TX - TSMC 16FFC
UDP/IP Protocol Hardware Stack - Low latency, High Throughput
12-bit 122.88MS/s Octa-Core ADC in 28nm
14bit 1.2MS/s SAR ADC in 40nm ULP
OTP/eMTP: 12Kbit NVM in 28nm Standard Logic CMOS process