
White Papers
A Process Independent Power Optimised Register File Architecture
SureCore is a developer of ultra-low power embedded memory solutions for SoC devices. This white paper describes how this low-power memory technology, originally designed for large, high density, SRAMs has been enhanced and adapted to deliver low-power, low-voltage register files.
To see the entire IP Doc from Tony Stansfield, sureCore, please log in or register.