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Interfacing to sensors using Data Converter IP
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Manuel Mota — Synopsys

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Interactions between people and electronic systems have evolved to the point that we can reasonably expect these systems to be "aware" of their environment-analyzing information about its position, acceleration, temperature, touch, light, pressure, flow, and so on, and then to act upon the information. To complete this process, the electronic system must acquire the information, convert it to an electrical quantity, and process it, which typically occurs through digital signal processing.

Sensors are the elements that translate real-world quantities into electric characteristics suitable for electronic handling. Different types of sensors translate the varying kinds of environmental information into electrical quantities. Their output is in the form of a current, a voltage, or a charge which can be "understood" and processed by electronics devices.

A system's signal processing chain includes the sensor itself and its control or biasing circuitry, the analog signal conditioning circuits, an analog-to-digital converter (ADC) and, finally the digital signal processor, as illustrated in Figure 1.

Figure 1: Typical signal processing chain

When implementing a system, alternative system partitions may be used. A common and flexible solution uses a general-purpose microcontroller (MCU), which takes care of all the required digital signal processing and other system-wide functions. Other options are FPGA- or ASIC-based systems.

MCU-based solutions are effective in systems using discrete sensors. Alternatively, a dedicated system-on-chip (SoC) with an embedded sensor can be a more effective total system solution. For example, micro-electro-mechanical systems (MEMS)-based sensors can be embedded with the corresponding digital signal processing block, thus integrating the complete chain in a single die. Regardless of the implementation choice, the data converter is integrated with the digital signal processing block in a single chip. When compared with using an additional discrete ADC chip, this partition greatly simplifies the system while reducing bill of materials (BOM) and footprint costs, which are critical considerations for area-sensitive medical, mobile, automotive and other applications.

Sensor signal processing can be broadly classified in terms of the bandwidth of the signal (the speed at which the physical quantity being measured changes) and the resolution required to obtain meaningful information. Figure 2 captures the different applications and their characteristics. It also shows that the ADC required to cover the complete range can be built out of two very effective architectures: Successive Approximation Register (SAR) and oversampling Sigma-Delta (SD) ADCs.

Figure 2: Sensor signal application requirements and the matching ADC type1

Data Converter Architectures for Sensor Data Acquisition

The ADC typically used in the sensor signal processing chain is implemented using one of two architectures: SAR or SD ADC. These architectures are the most efficient when applied to match the characteristics of the signal being processed.

Although the type of sensors used to measure environment characteristics vary widely, depending on the quantity being measured, the electrical signals they produce have some characteristics in common that make the each of the converters ideal: these are low-bandwidth signals-ranging from a few Hz up to hundreds of kHz-which have low sampling rate requirements for the ADC. Conversely, the accuracy requirements to correctly process the signal can be high, ranging from 6-8-bit up to 20-bit and beyond. SAR ADC and SD ADC offer high versatility and low power dissipation, making them ideal for these systems, as illustrated in Figure 2.

Figure 3 shows a simplified SAR ADC block diagram. A SAR ADC converges to the final value by successively comparing the sample and hold (S&H) input signal (VS&H) with a binary weighted threshold, defined by an internal DAC. The selection of the comparison threshold is made by the Successive Approximation state machine, in accordance to the result of the previous comparison, progressively getting closer to the actual sampled value.

Modern implementations of the SAR architecture are extremely compact and low-power. They are most effective for resolutions up to 12-bit or 14-bit. Higher resolutions are also possible, but require the use of dedicated calibration techniques that make the ADC's power and area footprint less appealing. ADCs are most effective for applications such as touch, acceleration, and flow sensing that require medium resolutions.

Given their simplicity (only one performance critical analog block: the comparator), SAR ADCs are ideal for SoC integration and can be effectively implemented in all process nodes from the conventional "analog" nodes (e.g., 180-nm) down to deep submicron, analog-"unfriendly" nodes without impacting their intrinsic performance characteristics.

Figure 3: Typical SAR ADC architecture

For applications that require higher resolution, the architecture of choice is the SD ADC.

The SD ADC oversamples the signal at a high rate and generates a bit stream whose density is proportional to the amplitude of the signal. Decimating this bit stream in the digital domain generates a digital representation of the input signal (Dout), as illustrated in Figure 4.

Figure 4: SD ADC architecture

Oversampling SD-based ADCs can effectively move quantization noise to an out-of-the-signal band ("noise shaping"), resulting in performance in excess of 20-bit to 24-bit over a relatively narrow signal band, making them more suitable for sensor applications such as energy metering in smart grids.

Similar to the SAR ADC, the SD ADC architecture is also highly suitable for integration in digital circuits. In fact, the ADC is, to a large extent, a digital circuit, with a single critical analog element: the amplifier in the integration loop.

Advantages of Integrating Data Converters in Digital Systems for Sensor Applications

All of the above considerations are valid for integrated and discrete data converter products; however, there is one important aspect where integrated and discrete components differ: their environment and how it affects their performance.


A data converter inside a discrete component typically is not impacted by noise coupling from the same die: the component is purposely built around the converter without any important noise sources in the same die. Furthermore, the silicon die for this circuit is typically pad-limited. In these cases, it is possible to take advantage of unused core area to implement additional circuitry like internal filtering and decoupling.

On the other hand, an embedded data converter is potentially impacted by noise coupling from the on-chip digital signal processing blocks. Furthermore, these circuits are typically core limited (i.e., the total silicon area of the chip is determined by the internal circuitry). In this case, any additional circuitry will impact the total mask cost and must be avoided.

If we consider a 12-bit converter, which has to resolve signal amplitudes down to a least significant bit (LSB) of only 730uV, then it is clear that a key performance criterion for integrated data converters is their immunity to noise: inside a digital integrated circuit, supply noise and even substrate noise can easily surpass this amplitude and thus disrupt the operation of the converter.

Noise isolation can be addressed at several levels:


  • At the converter block level, through the use of circuit isolation techniques and differential topologies and internal low dropout regulator (LDO) to improve supply noise impunity of critical blocks.
  • At integration level, through careful signal and supply distribution and isolation. Internal LDO regulators can also be used to effectively increase the supply rejection of critical elements in the circuit, thus reducing the overall sensitivity to noise.
  • At system level, specific operation modes may be defined to reduce the noise to its minimum. For example:
    • Averaging of several samples is an effective low pass filter for any type of white noise that may be present in the input signal or be coupled in other elements of the signal processing chain.
    • In case maximum accuracy is needed in a single shot acquisition, the system can be stopped (or its activity reduced) during the critical sampling instant.


System Power Reduction

Another advantage of integrating the data converter with the digital processor for sensor applications is the reduction of the total system power, a critical feature for remote or inaccessible sensing equipment where battery life needs to be extended. Integrating the data converter with the digital system reduces the total power dissipation by:


  • Eliminating the need to interface with a separate chip
  • Allowing for more efficient power management. For example, making full use of the several power savings modes that are present in the system, reducing the number of supply levels required for system operation (typical external devices still require higher supply levels than most present day integrated circuits)



Effective sensor data acquisition systems can take advantage of the integration trends to reduce costs and save power. Today's system integrator has a wide range of Data Converter IP created specifically for integration with digital processing blocks for sensor-based applications. They offer the range of performance and functionality that matches the characteristics of most sensors. Furthermore they address the critical system level requirements such as BOM reduction and power conservation, yielding a more efficient system.

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Synopsys delivers semiconductor design software, intellectual property (IP), design for manufacturing (DFM) solutions and professional services that companies use to design systems-on-chips (SoCs) and electronic systems. The company's products enable semiconductor, computer, communications, consumer electronics and other companies that develop electronic products to improve performance, increase productivity and achieve predictable success from systems to silicon


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About the Author

Manuel Mota

Manuel Mota, Technical Marketing Manager for Data Converter IP within the Solutions Group at Synopsys, has worked in the semiconductor industry for more than 10 years as analog IP designer for Chipidea Microelectronica (Portugal) with responsibility for the design of PLL and Data Conversion IP cores as well as complete Analog Front-Ends for communications. He later assumed the role of Business Developer for Data Conversion products with the responsibility of product definition and pre-sales technical engagement with customers. He joined Synopsys from MIPS Technologies in May 2009, assuming the Technical Marketing Manager role. Manuel holds a PhD in Electronic Engineering from the Lisbon Technical University which he completed while working at CERN (Switzerland) as a Research Fellow. He has authored several technical papers and presented in technical conferences on analog and mixed signal design.